PZ80emu - The PZ80 Machine Emulator

While I was messing about with the PZ80 schematics, I realized that I really needed an environment where I could write and run test code for the ROM monitor before I went burning EEPROMs.  I searched around for a few days for a suitable machine emulator, but ran into severe bugs with those that I found that weren't tailor made as CP/M emulators.

While I was searching around, I came across the website of Marat Fayzullin, who wrote a fantastic HOWTO on writing computer emulators:

http://fms.komkon.org/EMUL8/HOWTO.html

The PZ80emu is far from complete, but so far is able to load ROMs compiled by z80asm on my Mac.  It executes them quite well from what I tell, as long as I don't use any of the instructions I haven't implemented yet.  I have also implemented a very basic NCurses interface, mostly because I've never coded with NCurses before and thought it would be fun.

The code is most definitely alpha, and is incomplete, but anyone interested in hacking on what I've got so far is more than welcome.  I will certainly keep the Git repository up to date as I hack on the code, and will gladly accept pull requests.

https://github.com/protoCall7/PZ80emu

PZ80 - Taking Another Step Back

After re-designing the bus buffering on the Z80, the project kind of stalled for me.  I ordered some parts now and again, and tweaked the schematics, but didn't make a whole lot of progress.

Feeling that this was an unacceptable state of affairs, I decided to take a step backwards and simplify my circuit.  What I would up with was the Z80 being fed with power from my bench supply, the entire data bus pulled low with 1K resistors, a few pull-up/down resistors on the control lines, and the oscillator.  Once that was set up, I connected my handy-dandy OpenBench Logic Analyzer up to the first 7 bits of the address bus, and to the clock signal, and fired everything up:

Admittedly, it didn't look like that on the first shot, but after some troubleshooting, it turned out to be user error in the configuration of the logic analyzer, not in the board itself.

The pattern above is caused by the address bus doing a binary countup.  The Z80 instruction set has the NOP instruction as 0x00.  By pulling the entire data bus low and resetting the CPU, the machine will start at address 0x0000, read a "NOP" from the data bus, increment the counter to 0x0001, read another "NOP", and repeat.  Since the current address in the program counter is displayed in binary on the address bus, the logic analyzer displays the above pattern when the board runs.

As far as farther incarnations of the design, I have decided to temporarily build a "MK1" type design, utilizing 32k of ROM and 32k of RAM.  It will use an SIO and a MAX-232 for serial communication, and I would like to work on implementing an IDE interface using CF storage (but this might wait).  This design won't be adequate to run CP/M, but will give me a working platform to start developing the ROM monitor, which will be an integral part of boot loading CP/M in the MK2 design, which would integrate a memory bank switching scheme to swap the ROM out for a 32k RAM chip as a part of the CP/M load process.

I haven't yet decided whether to implement the Z80-CTC for interrupt control + Z80-SIO timing in the MK1 design, or just use another full can oscillator to give a fixed serial baud rate, but I will be going with one of those two methods.

In the mean time, I have been working on putting together a machine emulator in C, as I haven't found anything suitable to write and debug my ROM monitor with, but that's a subject for another post.

One last note, I finally decided on a name - The PZ80!

Commodore Build

A few months back, I ran across a post over at Hackaday telling the story of a Kickstarter trying to put the original C64 injection molds back into production making enclosures.

http://hackaday.com/2015/03/11/hackaday-retro-edition-a-new-commodore-64-case/

I never had the pleasure of owning a C64, but I always wanted to play around with one, especially with some of the MIDI sequencer software floating around.  I couldn't help myself, and decided to back the Kickstarter and get one of the enclosures.  After hearing a horror story about a factory fire from the Kickstarter update, I started to doubt that the enclosure would ever show up... Until today today, when I received a mysterious package containing...

I am still working on sourcing a board, but I have a line on several non-functional ones.  I'm hoping that with a couple bad boards, the original schematics, and some soldering iron time, that I can cobble together a working C64.  Having the enclosures sitting here certainly makes the project feel more likely to actually happen.  Stay tuned for more updates!

Z80 Computer - Bus Buffering Rev 1

The original draft (and parts order) of my Z80 machine had a buffering scheme largely borrowed from the ZAP machine, described in Build Your Own Z80 Computer by Steve Ciarcia.  It consisted of three 74367 6-Bit Non-Inverting Drivers, and two Intel 8212 8-Bit Input/Output Ports*.

The 74367 chips acted as the address bus buffer, leaving 1/3 of one of the chips unused.  The 8212 ports were wired back to back, using BUSAK to disable the address bus drivers, and RD to switch between the Input configured 8212 and the output configured 8212.

Once I got to building the circuit on the breadboard in anticipation of my initial LED test, I started to realize that my chip count was going to be very high, and there was a LOT of wiring involved in the buffering alone.

I took a step back from the project for a bit, and browsed around Digikey and Jameco, read a few datasheets, and I'm thinking that using a pair of 74LS541 Octal Tri-State Line Drivers for the address bus and a 74LS245 Octal Tri-State Transceiver for the data bus might be the way to go.  It certainly simplifies the wiring and lowers the chip count.




* The 74412 appears to be pin compatible with the 8212.  I have not evaluated the datasheets of both parts to know whether the 74412 can be a direct replacement or not, but I did use it rather than create a new library footprint in Eagle.  Check the datasheet before using the 74412.

Z80 Computer

Work has begun on a project that I have wanted to do for many years, and put off for one reason or another.  A few months ago, I decided that I wanted to (finally) build a Z80 machine from scratch, get it to run CP/M, and play a game of Zork.  I hadn't the foggiest idea what it would take, but I have picked up a touch of electronic and programming background over the years, so I decided to take a hack at it.

After a few months of research, design, and waiting for shipping, the first breadboards are starting to go together.  The machine will be a Z80A CPU running at 4MHz with 64k of RAM and 32k of ROM.  I intend to use a Zilog Z80-SIO with a MAX232 to communicate with an old NEC dumb terminal that I have laying around for control.

So far I have constructed the clock, the reset circuit, a single-instruction step circuit, and the beginnings of the bus buffering and signal/address decoding.  I intend to detail each circuit in an individual post including relevant schematics and measurements.

My first test will come shortly, once I finish wiring up the buffers.  I will be pulling the entire data bus low, and hooking LEDs to the buffered address bus output.  If all goes well, the CPU will read NOP off of the grounded data bus, and proceed to increment the address bus every time I run the single-instruction stepper.  The end effect -- A 16 bit binary counter.

From there, I can go into decoding, RAM/ROM, peripherals, some kind of storage, writing a ROM monitor, writing a custom CP/M BIOS, and on, and on, and on.  Oh well, I needed a project and more material for this blog anyway, and from the looks of it, I've got plenty to do now.