After a few months of research, design, and waiting for shipping, the first breadboards are starting to go together. The machine will be a Z80A CPU running at 4MHz with 64k of RAM and 32k of ROM. I intend to use a Zilog Z80-SIO with a MAX232 to communicate with an old NEC dumb terminal that I have laying around for control.
So far I have constructed the clock, the reset circuit, a single-instruction step circuit, and the beginnings of the bus buffering and signal/address decoding. I intend to detail each circuit in an individual post including relevant schematics and measurements.
My first test will come shortly, once I finish wiring up the buffers. I will be pulling the entire data bus low, and hooking LEDs to the buffered address bus output. If all goes well, the CPU will read NOP off of the grounded data bus, and proceed to increment the address bus every time I run the single-instruction stepper. The end effect -- A 16 bit binary counter.
From there, I can go into decoding, RAM/ROM, peripherals, some kind of storage, writing a ROM monitor, writing a custom CP/M BIOS, and on, and on, and on. Oh well, I needed a project and more material for this blog anyway, and from the looks of it, I've got plenty to do now.
